The flow of information in a network is often called ‘traffic’. Units of information used in network communication are referred to as ‘packets’. Packets generally arrive at a point in the network at random intervals resulting in ‘bursts’ of traffic, causing congestion and ‘idle’ periods in which traffic is somewhat more sparse.
Systems that use a network for communication can benefit from the analysis and characterization of the network traffic to optimize the critical performance parameters that are involved in that communication. An example of the application of this type of analysis is the synchronization of a user process with the completion of the receive operation at the system to network interface. A common design problem with this process is the need to determine when the receive data is available at the input buffers. The method of synchronization used can directly affect the latency of the receive operation and the utilization of the host computer processor. One way to do the analysis of the network traffic is to provide a model that recognizes the characteristics of the network traffic. Since network traffic has been shown to be bursty, a method used to analyze network traffic should be able to represent behavior that is bursty.
Different methods are known for analyzing and characterizing network traffic. The Poisson Process is widely utilized to model aggregate traffic from voice sources. Bursty traffic has been shown to be approximated by a Markov modulated Poisson process (MMPP). An MMPP model can be a very effective means to provide effective network traffic analysis of data communication, either in batch mode or, preferably, in real time.
Low-latency network architectures provide special mechanisms to improve the performance of the network interconnect in message-passing systems. The synchronization of the user process with the completion of the receive operation at the network interface card (NIC) has the common design problem that it needs to be determined when receive data is available at the input buffers. One of the mechanisms used for synchronization is interrupts (blocking), but the problem with interrupts is that they can add to the cost of synchronization with excessive latency and CPU utilization. Polling is a mechanism intended to help reduce the high latency of interrupts by polling on a completion signal as an alternative to waiting for an interrupt as a method to synchronize the user process with the completion of the receive operation. If the polling is done from user space, then the time needed for kernel transitions is saved, thus reducing the latency of the operation even further. The polling operation, however, uses the host processor during the time it is polling the completion flag. Therefore, if the message arrival delay exceeds the interrupt time, then the increase in host processor utilization will actually have a negative impact on the performance of the application. It becomes necessary to select between polling and blocking (waiting for the interrupt) depending on the delay of the message. Therefore, two important concerns regarding the performance of the network interconnect are the overall latency of the message communication and the CPU overhead involving the send and receive primitives. The goal is to balance the latency requirements with the host processor utilization requirements to obtain the best performance for the various arrival patterns experienced at the NIC receive input port.